time comparator,word

The digital comparator designed with FPGA generates several PWM current waveform synchronously,to realize the step angles even division control for four-phase stepping motor.

并通过FPGA设计的数字比较器,同步产生多路PWM电流波形,实现对四相步进电动机转角进行均匀细分控制。

The DC motor control circuit by FPGA and the design method of digital comparator with VHDL are introduced.

针对基于CPU的脉宽调制控制的不足,给出一个基于FPGA的脉宽调制直流电机控制方案,提出FPGA电机控制电路和数字比较器的VHDL设计方法。

An improved magnitude comparator in switch-level;

一种改进的开关级数字比较器

The magnitude comparator designed with FPGA generates several PWM current waveform synchronously,to realiz the step angles even division control for four-phase stepping motor.

利用FPGA中的嵌入式EAB构成LPM_ROM存放步进电机各相细分电流所需的PWM控制波形数据表,并通过FPGA设计的数字比较器同步产生多路PWM电流波形,实现对四相步进电机转角进行均匀细分控制。